In photolithographic systems, there is a need to achieve a high resolution in order to resolve fine, high density, high-resolution patterns. In a photolithographic system employed in the integrated circuit (IC) industry, light is projected onto a resist for the purpose of patterning an electronic device. Significant improvement in the resolution of photolithographic systems has been one of the most important enablers for the manufacture of high density and high speed semiconductor IC chips.
Generally, the resolution of a photolithographic system is dependent upon, among other things, the wavelength of the light. The wavelength has been progressively reduced from the mercury G-line (436 nm) to the ArF excimer laser line (193 nm), and further to 157 nm and possibly into the extreme-ultraviolet (EUV) wavelengths. Other techniques, such as phase-shifting masks, off-axis illumination, immersion lithography, and the like, have led to further reductions. However, these techniques of improving the resolution are approaching physical and technical limits.
In order to push the lithographic limit further and to create even smaller, more densely packed devices, multiple patterning technology (MPT) techniques are being developed. The multiple patterning technology decomposes layout patterns into sub-patterns and then uses two or more masks to print each sub-pattern. The interaction between these sub-patterns may, however, create a cell abutting problem for both standard cell designers and placement EDA (Electronic Design Automation) tools. Cell abutting problems may arise, for example, when two sub-patterns have objects assigned to the same mask along a cell boundary such that when the cells are positioned next to each other, the objects are too close to each other for the objects to be adequately defined by a single mask.
Previous attempts to reduce or resolve the cell abutting problems of the multiple patterning technology comprise including large buffer zones in standard cell boundaries or imposing cell abutting constraints into the placement tools. Inserting large buffer zones in standard cell boundaries may suffer an area penalty, while imposing complex cell abutting constraints into placement tools may suffer quality degradation, such as ineffective timing optimization and low utilization rate (area penalty).